(1) Field of the Invention
The invention relates to the fabrication of integrated circuit devices, and more particularly, to a method and package that provides reduced surface and internal stress in the packaging medium.
(2) Description of the Prior Art
Semiconductor devices are typically produced by simultaneously creating a large number of identical integrated circuit (IC) devices (also referred to as semiconductor die or simply as die) in or on the surface of a semiconductor substrate in arrays of rectangular elements. Electrical access is provided to the individual die by providing contact pads, also referred to as Input/Output (I/O) pads, on the surface of the die. The I/O pads are further connected to elements within the die by means of interconnect metal that is used as signal lines, ground planes and power lines.
The process of packaging semiconductor devices typically starts with a leadframe of a substrate that is ceramic or plastic based, such as Dual-In-Line packages (DIP), Pin Grid Arrays (PGA), Plastic Leaded Chip Carriers (PLCC), Quad Flat Packages (QFP) and Ball Grid Array (BGA) packages.
The Quad Flat Package (QFP) has been created to achieve high pin count integrated packages with various pin configurations. The pin Input/Output (I/O) connections for these packages are typically established by closely spaced leads distributed along the four edges of the flat package. This limits the I/O count of the packages and therefore the usefulness of the QFP. The Ball Grid Array (BGA) package has been created whereby the I/O connects for the package are distributed around the periphery of the package and over the complete bottom of the package. The BGA package can therefore support more I/O points and provides a more desirable package for high circuit density with high I/O count. The BGA contact points are solder balls that in addition facilitate the process of flow soldering of the package onto a printed circuit board. The solder balls can be mounted in an array configuration and can use 40, 50 and 60 mil spacings in a regular or staggered pattern.
Another packaging concept is realized with the use of so-called flip chips. The flip chip is a semiconductor device that has conductive layers formed on its top surface. The top surface of the flip chip is further provided with so-called solder bumps. At the time of assembly of the flip chip, the chip is turned over (flipped over) so that the solder bumps are now facing downwards and toward the circuit board, typically a printed circuit board, on which the flip chip is to be mounted.
The invention addresses the aspect of a semiconductor device package that contains a heat spreader, the design of the heat spreader of the invention is such that stress is significantly reduced in surfaces of the package.
U.S. Pat. No. 5,905,633 (Shirn et al.) shows a heat spreader with grooves 68.
U.S. Pat. No. 6,158,502 (Thomas) shows a heat spreader with grooves, this reference differs from the invention.
U.S. Pat. No. 6,117,352 (Weaver et al. shows an etched heat spreader.
U.S. Pat. No. 6,011,304 (Mertol), U.S. Pat. No. 5,949,137 (Dornadia et al.), U.S. Pat. No. 5,484,959 (Burns) show related heat spreaders.
A principle objective of the invention is to provide a semiconductor device package comprising a heat spreader, whereby the design of the heat spreader is such that stress is significantly reduced in surfaces of the package.
In accordance with the objectives of the invention a new design is provided for the heat spreader of a semiconductor package. Grooves are provided in a surface of the heat spreader, subdividing the heat spreader for purposes of stress distribution into multiple sections. This division of the heat spreader results in a reduction of the mechanical and thermal stress that is introduced by the heat spreader into the device package. Mechanical and thermal stress, using conventional heat spreader designs, has a negative, stress induced effect on the semiconductor die, on the contact points (bump joints) of the semiconductor die and on the solder ball connections of the package.